Parallel port

Circuit Protection of Parallel Port

Design Notes:

Protection Application:
In the Parallel port, there are 17 data and control lines to be protected against ESD. The signals operate up to 2 Mbps and with a magnitude between -2.0 and 7.0V. For these lines, the capacitance of the suppress should be taken into account.
Solution Description:
As shown at the left, discrete multilayer varistors can be used for board layout flexibility. These parts will meet the capacitance requirements for the data and control lines, as well as the bi-polar stand-off voltage requirement.
Companion Solutions:
Other solutions within the Littelfuse portfolio exist in addition to these recommendations. For example, if arrays are preferred for part count reductions, products like the V19MLN41206 should be considered.
Regulatory Issues:
The IEC 61000-4-2 will be the most appropriate standard that applies for this port. It supplies a test method for verifying that the end product is not susceptible to ESD events.
Unique Features:
Does not apply.
Application Warnings:
Does not apply.



  • V9MLA0402

    Multilayer Transient Voltage Suppressor